SITIS Topic Details |
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| Proposals Accepted: | |
| Program: | STTR |
| Topic Number: | AF10-BT31 (AirForce) |
| Title: | VLSI CMOS-memristor Building-block for Future Autonomous Air Platforms | Research & Technical Areas: | Information Systems |
| Objective: | Develop revolutionary parallel neuromorphic analog/digital computing architectures.
| Description: | Future information processing systems will require some basic level of intelligence to aid user decision-making capabilities. Neuromorphic computing promises to allow the development of intelligent systems able to imitate natural neuro-biological processes. This is achieved by mimicking the highly parallelized computing architecture of the biological brain. In theory, neuromorphic computers are suitable for applications in decision making by being able to intelligently process vast amount of information in parallel and in real time. The continuing improvements within microelectronics research and development allow for the integration of hundreds of millions of CMOS transistors within a single silicon chip within just about 1 cm2. For example, the number of neurons in honey bee brain is equal to approximately 950,000 [1], and honey bees can perform autonomous functions un-matched by even the powerful supercomputers and clever algorithms in the world today such as navigation and organization skills to find and store food. However, given today’s technology integration capabilities, it should be possible to recreate in hardware, the computing architecture that enables honeybees or any other simple biological organisms to perform autonomous functions. In addition, recent developments in memristor-based technologies claim the invention of the physical analog to the synapse [2][3][4]. In theory, memristor-like technology (passive memory devices: memristor, magnetic junction, and/or continuous variable resistance devices) would enable massively parallel large scale neuromorphic computing processor architecture development. In particular, this work will:
| PHASE I: Simulate and demonstrate autonomous computing building cell block with power consumption of less to 2x10-11 Watts and footprint area of less than 2x10-13 m2.
| PHASE II: Build and optimize neuromorphic computing processors able to learn and recall complex information patterns of up to 1 MB in size.
| PHASE III | DUAL USE COMMERCIALIZATION:
Military Application: This research will provide foundations to develop processing systems capable of performing basic intelligent operatons for military systems for data analysis, database cross-correlation.
Commercial Application: This research will provide foundations to develop processing systems capable of performing basic intelligent operatons for commercial systems such as automated video surveillance.
| References: | 1. Menzel, R. and Giurfa, M., “Cognitive architecture of a mini-brain: the honeybee,” Trd. Cog. Sci., 5 (2001) 62-71. 2. L. Chua, "Memristor - The Missing Circuit Element," IEEE Transactions on Circuits Theory (IEEE) 18 (1971) 507–519. 3. D.B. Strukov, G.S. Snider, D.R. Stewart, and R.S. Williams, "The missing memristor found," Nature, 453 (2008) 80-83. 4. R. Stanley Williams, “How We Found the Missing Memristor,” IEEE Spectrum, 45 (2008)28-35. |
| Keywords: | Neuromorphic computing; Computational Intelligence; Neuromorphic Hardware; Brain Engineering; Neuro-biological Architectures; Sense Making Computing; Neuron Synapse Electronics; Biomorphic; Physical Neural Network |
Questions and Answers: |
No questions posed on this topic at this time |
As of midnight September 1, questions for solicitations SBIR 10.3 and STTR 10.B will no longer be accepted.
To read the solicitation for full proposal preparation and submission details click here. |